10G/5G Verification IP
Ensuring flawless chip designs with trusted IP verification solutions
Overview
Silicon Yard’s 10G/5G Ethernet Verification IP provides an effective & efficient way to verify the components interfacing with Ethernet interface of an IP or SoC. Silicon Yard’s 10G/5G Ethernet VIP is fully compliant with IEEE standard 802.3 specification. This VIP is light weight with an easy plug -and- play interface so that there is no hit on the design cycle time.
Key Benefits
- Available in native System Verilog (UVM/OVM/ VMM) and Verilog
- Unique development methodology to ensure the highest levels of quality
- Availability of Compliance & Regression Test Suites
- 24X5 customer support
- Unique and customizable licensing models
- Exhaustive set of assertions and coverage points with connectivity example for all the components
- Consistency of interface, installation, operation, and documentation across all our VIPs
- Provide complete solution and easy integration in IP and SoC environment
Features
- Provides 10G/5G as per IEEE Std 802.3
- Supports Ethernet XGMII
- Supports XSBI
- Supports LX4 & CX4
- Supports LRM, CR, ER, LR
- Supports full duplex ethernet MAC
- Supports 64/66B PCS, BASE-R
- Supports 8B/10B PCS, BASE-X
- Supports FEC Decoder
- Supports PMD Training
- Supports AN
- Supports Energy Efficient Ethernet.
- Supports all possible widths for PCS to Serdes interface.
- Supports clock data recovery (CDR).
- Supports Pause Frame-Based Flow Control.
- Supports test pattern generation and checking.
- Supports Management data Input/output registers.
- Supports full duplex operation.
- Callback support in all Layers to provide user control.
- Rich set of configuration and parameters.
- Supports Dynamic as well as Static Error Injection scenarios.
- On the fly protocol checking static and dynamic assertion.
- Built in Coverage analysis.
- Supports XGXS and 10Gigabit XAUI.
- Supports the USXGMII.
- Graphical analyzer to show transactions for easy debugging.
