100M Ethernet Verification IP

Ensuring flawless chip designs with trusted IP verification solutions

Overview

Silicon Yard’s 100M Ethernet Verification IP offers an effective and efficient way to verify components interfacing with the Ethernet interface of an IP or SoC. Fully compliant with the IEEE 802.3-2022 specification, this Verification IP (VIP) is lightweight and features an easy plug-and-play interface, minimizing impact on the design cycle.

Key Benefits

  • Native System Verilog (UVM): Available in native System Verilog (UVM) to streamline integration.
  • Quality Development Methodology: Ensures the highest levels of quality.
  • Flexible Licensing Models: Unique and customizable to suit varied needs.
  • Exhaustive Assertions & Coverage Points: Includes a comprehensive set with connectivity examples for all components.
  • Consistency: Uniform interface, installation, operation, and documentation across all VIPs.
  • Complete Solution: Easy integration in both IP and SoC environments

Features

  • Supports standard MII (Media Independent Interface) interface.
  • Supports Full Duplex operation.
  • Supports MMD block in all Physical sub-layers.
  • Provides STA controller to configure the MMD blocks.
  • Supports all types of error injection and detection.
  • On-the-fly protocol checking using protocol check functions.
  •  Performs 4B/5B encoding and 5B/4B decoding.
  • Supports Serialization/Deserialization of code groups.
  • Supports Mapping of Transmit, Receive, and Carrier Sense mechanisms between MII and PMA.
  • Supports block distribution according to Ethernet frame format.
  • Performs Clock Data Recovery (CDR) operation on incoming data from below Sub-layer.
  • Supports NRZI (Non-Return-to-Zero Inverted) Encoding.
  • Supports Fault Detection and Fault Signaling.
  • Supports carrier detection and link integrity monitoring.
  • Provides configuration in monitor for both error injection and normal test cases.
  • Provides scoreboard for endpoint verification.
  • Support clock and data recovery for all Phy sublayers.
  • Provides local loopback & Remote Loopback to/from the service interfaces.
  • Callbacks in RS and Phy layers to provide user control.
  • Graphical Protocol layer analyzer shows Ethernet data for easy debugging
  • Uses 4B/5B encoding to convert 100 Mbps data into 125 Mbps line rate.
  • Works over two twisted pairs in Cat5 cables.
  • Supports Auto-Negotiation to select speed/duplex mode